Fluke MET/CAL Procedure ============================================================================= INSTRUMENT: Fluke 2620A Hydra: (1 year) CAL VER RS-232C /5720 INSTRUMENT: Fluke 2625A Hydra: (1 year) CAL VER RS-232C /5720 DATE: 12-Aug-98 AUTHOR: Fluke Corporation REVISION: $Revision: 1.4 $ ADJUSTMENT THRESHOLD: 70% NUMBER OF TESTS: 26 NUMBER OF LINES: 215 CONFIGURATION: Fluke 5720A ============================================================================= # # Source: # HYDRA # 2620A Data Acquisition Unit # 2625A Data Logger # 2635A Data Bucket # Service Manual, PN 889589, May 1991, Rev. 2, 11/93 # # Compatibility: # MET/CAL 4.23 or later # # Subprocedures: # None # # Required Files: # ini_val.exe Gets default serial port for UUT from METCAL.INI. # # System Specifications: # TUR calculation is based on specification interval of the accuracy file. # The default 5720A accuracy file contains 90 day specs. # # Fluke makes no warranty, expressed or implied, as to the fitness # or suitability of this procedure in the customer's application. # # The 90 day specifications of the 5720A are used in TUR computations. # STEP FSC RANGE NOMINAL TOLERANCE MOD1 MOD2 3 4 CON 1.001 ASK- R Q N P F W 1.002 HEAD EQUIPMENT SETUP 1.003 DISP [32] WARNING 1.003 DISP HIGH VOLTAGE is used or exposed during the performance 1.003 DISP of this calibration. DEATH ON CONTACT may result if 1.003 DISP personnel fail to observe safety precautions. 1.004 DISP Connect the UUT to an AC power source. 1.004 DISP Turn the UUT on. 1.004 DISP Warm-up time: 30 minutes. 1.004 DISP Ambient temperature: 18C - 28C. 1.004 DISP Relative humidity: less than 70%. 1.005 DOS ini_val metcal.ini startup port 1.006 DISP Connect the UUT to the [MEM2]. 1.007 DISP To select the proper RS-232C parameters on Fluke Hydra: 1.007 DISP Press SHIFT, then LIST to select COMM. 1.007 DISP Use the up and down arrow keys to make selections. 1.007 DISP Select 4800 baud and press ENTER. 1.007 DISP Select no Parity and press ENTER. 1.007 DISP Select OFF Echo and press ENTER. 1.008 HEAD PERFORMING SELF TEST... (~35s) 1.009 PORT [P4800,N,8,1,X][T10000] 1.010 PORT [CLR]*TST?[10][D32000][I] 1.011 EVAL -e MEM == 0 : Self Test, status = [MEM] 2.001 JMP 26.002 FAIL 2.002 HEAD EQUIPMENT SETUP 2.003 DISP *************************************************** 2.003 DISP 2.003 DISP To reduce noise pickup by test leads, particularly 2.003 DISP during high Ohms verification, use shielded test 2.003 DISP cables between the Fluke 5720A and Fluke Hydra. 2.003 DISP 2.003 DISP *************************************************** 2.004 DISP Make the following connections to the Input Module: 2.004 DISP [32] 5720A OUTPUT HI to CH1 HI INPUT 2.004 DISP [32] 5720A OUTPUT LO to CH1 LO INPUT 2.004 DISP [32] 5720A SENSE HI to CH11 HI INPUT 2.004 DISP [32] 5720A SENSE LO to CH11 LO INPUT 2.005 RSLT = 2.006 RSLT = 2.007 JMP 3.001 2.008 EVAL dummy 3.001 HEAD {DIRECT VOLTAGE PERFORMANCE VERIFICATION} 3.002 PORT *RST;FUNC 1,VDC,1;MON 1,1[10] 3.003 5720 0.00mV S 2W 3.004 PORT [CLR]MON_VAL?[10][I] 3.005 MATH MEM = MEM * 1000 3.006 MEME 3.007 MEMC 300 mV 0.02U 4.001 5720 150.00mV S 2W 4.002 PORT [CLR]MON_VAL?[10][I] 4.003 MATH MEM = MEM * 1000 4.004 MEME 4.005 MEMC 300 mV 0.07U 5.001 5720 290.00mV S 2W 5.002 PORT [CLR]MON_VAL?[10][I] 5.003 MATH MEM = MEM * 1000 5.004 MEME 5.005 MEMC 300 mV 0.11U 6.001 PORT MON 0;FUNC 1,VDC,2;MON 1,1[10] 6.002 5720 2.9000V S 2W 6.003 PORT [CLR]MON_VAL?[10][I] 6.004 MEME 6.005 MEMC 3 V 0.0012U 7.001 5720 -2.9000V S 2W 7.002 PORT [CLR]MON_VAL?[10][I] 7.003 MEME 7.004 MEMC 3 V 0.0012U 8.001 PORT MON 0;FUNC 1,VDC,3;MON 1,1[10] 8.002 5720 29.000V S 2W 8.003 PORT [CLR]MON_VAL?[10][I] 8.004 MEME 8.005 MEMC 30 V 0.010U 9.001 PORT MON 0;FUNC 1,VDC,4;MON 1,1[10] 9.002 5720 150.00V S 2W 9.003 PORT [CLR]MON_VAL?[10][I] 9.004 MEME 9.005 MEMC 150 V 0.06U 10.001 5720 290.00V S 2W 10.002 PORT [CLR]MON_VAL?[10][I] 10.003 MEME 10.004 MEMC 300 V 0.10U 11.001 PORT MON 0[10] 11.002 5720 * S 11.003 RSLT = 11.004 HEAD {ALTERNATING VOLTAGE PERFORMANCE VERIFICATION} 11.005 PORT FUNC 1,VAC,1;MON 1,1[10] 11.006 5720 20.00mV 1kH O S 2W 11.007 PORT [CLR]MON_VAL?[10][I] 11.008 MATH MEM = MEM * 1000 11.009 MEME 11.010 MEMC 300 mV -0.29U +0.28U 1kH 12.001 5720 20.00mV 100kH O S 2W 12.002 PORT [CLR]MON_VAL?[10][I] 12.003 MATH MEM = MEM * 1000 12.004 MEME 12.005 MEMC 300 mV 1.50U 100kH 13.001 5720 290.00mV 1kH S 2W 13.002 PORT [CLR]MON_VAL?[10][I] 13.003 MATH MEM = MEM * 1000 13.004 MEME 13.005 MEMC 300 mV 0.74U 1kH 14.001 5720 290.00mV 100kH S 2W 14.002 PORT [CLR]MON_VAL?[10][I] 14.003 MATH MEM = MEM * 1000 14.004 MEME 14.005 MEMC 300 mV 15.0U 100kH 15.001 PORT MON 0;FUNC 1,VAC,2;MON 1,1[10] 15.002 5720 2.9000V 1kH S 2W 15.003 PORT [CLR]MON_VAL?[10][I] 15.004 MEME 15.005 MEMC 3 V 0.0066U 1kH 16.001 PORT MON 0;FUNC 1,VAC,3;MON 1,1[10] 16.002 5720 29.000V 1kH S 2W 16.003 PORT [CLR]MON_VAL?[10][I] 16.004 MEME 16.005 MEMC 30 V 0.069U 1kH 17.001 PORT MON 0;FUNC 1,VAC,4;MON 1,1[10] 17.002 5720 290.00V 1kH S 2W 17.003 PORT [CLR]MON_VAL?[10][I] 17.004 MEME 17.005 MEMC 300 V 0.66U 1kH 18.001 PORT MON 0[10] 18.002 5720 * S 18.003 RSLT = 18.004 HEAD {RESISTANCE PERFORMANCE VERIFICATION} 18.005 PORT FUNC 1,OHMS,1,4;MON 1,1[10] 18.006 5720 0.00Z S 4W 18.007 PORT [CLR]MON_VAL?[10][I] 18.008 MEME 18.009 MEMC 300 Z 0.09U 19.001 5720 190.00Z S 4W 19.002 PORT [CLR]MON_VAL?[10][I] 19.003 MEME 19.004 MEMC 300 Z -0.13U +0.20U 20.001 PORT MON 0;FUNC 1,OHMS,2,4;MON 1,1[10] 20.002 5720 0.0000kZ S 4W 20.003 PORT [CLR]MON_VAL?[10][I] 20.004 MATH MEM = MEM / 1000 20.005 MEME 20.006 MEMC 3 kZ 0.0003U 21.001 5720 1.9000kZ S 4W 21.002 PORT [CLR]MON_VAL?[10][I] 21.003 MATH MEM = MEM / 1000 21.004 MEME 21.005 TOL -.0013U +.0014U 21.006 MEMC 3 kZ TOL 22.001 PORT MON 0;FUNC 1,OHMS,3,4;MON 1,1[10] 22.002 5720 19.000kZ S 4W 22.003 PORT [CLR]MON_VAL?[10][I] 22.004 MATH MEM = MEM / 1000 22.005 MEME 22.006 MEMC 30 kZ 0.013U 23.001 PORT MON 0;FUNC 1,OHMS,4,4;MON 1,1[10] 23.002 5720 190.00kZ S 4W 23.003 PORT [CLR]MON_VAL?[10][I] 23.004 MATH MEM = MEM / 1000 23.005 MEME 23.006 MEMC 300 kZ 0.13U 24.001 PORT MON 0;FUNC 1,OHMS,5,4;MON 1,1[10] 24.002 5720 1.9000MZ S 4W 24.003 PORT [CLR]MON_VAL?[10][I] 24.004 MATH MEM = MEM / 1000000 24.005 MEME 24.006 MEMC 3 MZ 0.0014U 25.001 PORT MON 0[10] 25.002 5720 * S 25.003 RSLT = 25.004 HEAD {FREQUENCY PERFORMANCE VERIFICATION} 25.005 PORT FUNC 1,FREQ,3;MON 1,1[10] 25.006 5720 10.000kH 2.9V S 2W 25.007 PORT [CLR]MON_VAL?[10][I] 25.008 MATH MEM = MEM / 1000 25.009 MEME 25.010 MEMC 90 kH 0.006U 26.001 PORT MON 0[10] 26.002 END